Pryroda Engineering

A press release by Aixtron (see our previous post), inspired a comment on our part and triggered an emails exchange with Dr. Christian Geng, General Manager Greater China of AIXTRON.

An extract of our email:

…In your recent comment (see extract and reference below), you noted that 6″ substrate should become competitive.
As an equipment manufacturer, we work on reducing the cost of sapphire substrates.
In this regard, we have some comments:

You mentioned that a 1000um thick 6″ substrate was used in your trails.
To obtain 1000um thick wafer, you usually loose 500um to cutting, grinding and other operations…

…2″ wafers are thinner. … Thus, while providing the same surface as nine(9) 2″ wafers, a 6″ wafer will require significantly more sapphire. If everything else is equal, no matter what is the price of sapphire, the surface provided by 6″ wafers will always be more expensive than the equivalent on 9×2″…

In his answer, Dr. Christian Geng, gave some estimation on what would be the yield improvement required to compensate for higher cost of the surface provided by 6″ wafers.
The exact yield improvement will depend on specification, the edge exclusion area is significantly small for 1 6″ in comparison to 9×2″, and also a better reactor utilization can increase the output spectacularly.
After epi, the chip process may also allow much higher throughput.
Dr. Geng also noted that cutting thinner 6″ wafers is definitely a way to improve 6″ competitiveness, while strain and bowing must be managed accordingly…

We are greatly thankful to Dr. Geng for his comments.

A more detailed description of issues raised can be obtained by email.